BARE-METAL HARDWARE MATRIX

IIT Madras Shakti Processor C-Class (64-bit Indigenous Core)

Deterministic systems profiling, Ring-0 IPC transfer rates, and bare-metal microkernel execution verification under the ARKM 12-core SMP operating substrate.

Jitter Bound<46 ns

Ring-0 IPC Cycles105 cycles

Fault BoundaryRing 0 / 3 IPC

Foreign Runtimes0 (Zero Dep)

Real-Time Execution & Hard Determinism

Sub-50ns interrupt latency using direct PLIC routing. Zero foreign microcode, foreign firmware, or non-auditable registers.

APIC Dispatch Vector: PLIC Direct Core Routing (RV64GCSU)

Sovereign Mandates & Zero-Telemetry Audit

100% indigenous Indian silicon IP. Exceeds Make in India and Buy Indian-IDDM Strategic Tier-0 mandates.

Subsystem Register Mapping & Allocation

socket:Indigenous SOC

vendor:IIT Madras

sovereignty:100% Indigenous IP

architecture:RISC-V RV64GCSU

pmm page size:SV39/SV48

interrupt controller:PLIC Native

Core Architectural MechanismARKM 12-Core Bare-Metal SMP Microkernel

Examine Kernel Teardown→